google/xls

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XLS: Accelerated HW Synthesis

Stars: 1.9k
Forks: 283
Open beginner issues: 1
Indexed issues: 1k
Avg merge: 2d 10h
Merged PRs (30d): 135

Dominant language: C++
License: Apache-2.0
Last GitHub push: Sep 15, 2026
Latest indexed: Sep 16, 2026
Contributing guide: Contributing guide
Code of conduct: Code of conduct
Beginner labels: good first issue

Open All

1012 open issues indexed

Use Bazel python rules with type checking support (e.g. pytype or mypy) Open

build long-term-enhancement

google/xls#8 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Define semantics for out-of-bounds array accesses in IR Open

documentation ir

google/xls#24 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
More formally handle endianness swaps between Z3 and XLS Open

cleanup formal

google/xls#37 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Avoid special handling of widthless wire/reg declaration in VAST Open

codegen

google/xls#43 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Characterize time-to-proof for IR/Netlist equality checks across ops and arg sizes. Open

formal investigation long-term-enhancement

google/xls#55 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
[DSLX] quickcheck support for parametric functions Open

dslx long-term-enhancement

google/xls#81 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
[DSLX] Path-update operator `:=` (mutation-free) Open

dslx long-term-enhancement

google/xls#82 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
DSLX-test JIT does not JIT the test fn bodies, only invoked functions Open

dslx jit

google/xls#120 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
[App] Implement more floating point operations in modules/ Open

app enhancement good first issue

google/xls#123 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
clang-format instruction in CONTRIBUTING.md and continuous integration Open

build

google/xls#125 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Open source benchmark runner script Open

build documentation

google/xls#130 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Consider allowing conversion from bits type to structs, or some destructuring pattern Open

dslx enhancement

google/xls#131 · 1 comment · 2 reactions · 0 assignees · Indexed Sep 16, 2026
Create FPGA LUT-to-Z3 translator Open

enhancement formal good first issue

google/xls#142 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Optimize split adds Open

optimizer

google/xls#144 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
IR visualizer mode that shows scheduled pipeline stages Open

enhancement visualization

google/xls#146 · 2 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
EvaluateNodeWithLiteralOperands() should return failed status with non-literal args Open

bug ir

google/xls#156 · 3 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Suggestion: optimizer should propagate file locations into invoke callee Open

optimizer

google/xls#160 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Insert clock gated flops for pipeline stages inserted for non-taken select/switch branches Open

long-term-enhancement optimizer

google/xls#161 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add support for Enumerate Operator in IR conversion Open

dslx enhancement

google/xls#164 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add comment in generated verilog saying how it was created Open

codegen enhancement good first issue

google/xls#168 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Prove correctness in the presence of back-pressure Open

formal

google/xls#175 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Run generated verilog through verilog formatter Open

codegen

google/xls#186 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
In-tree yosys binary doesn't have synth_{ecp,ice40} commands available Open

build

google/xls#188 · 5 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Confusing name/behavior for `signex` Open

dslx good first issue

google/xls#191 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Document stdlib automatically from source text Open

documentation dslx long-term-enhancement

google/xls#192 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add unifying type inference Open

dslx enhancement long-term-enhancement

google/xls#193 · 2 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Parameterizable type aliases Open

dslx

google/xls#194 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add record types to IR Open

ir

google/xls#195 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Support use before define within a file Open

dslx long-term-enhancement

google/xls#197 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Change semantics of divide by zero Open

ir

google/xls#199 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Unify IR-based tests Open

cleanup ir testing

google/xls#216 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Warn/error on top level symbols that are unused Open

dslx enhancement

google/xls#217 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
DSLX: add an `unimplemented` expression that always typechecks Open

dslx long-term-enhancement

google/xls#218 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
[DSLX] Better error message when for-loop results are unused Open

dslx enhancement

google/xls#220 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
JIT duplicates body of non-entry functions Open

bug jit

google/xls#225 · 1 comment · 0 reactions · 2 assignees · Indexed Sep 16, 2026
Automatically test equivalence of optimized IR with unoptimized IR Open

build

google/xls#226 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Use generate for array operations in Verilog Open

codegen

google/xls#235 · 1 comment · 1 reaction · 0 assignees · Indexed Sep 16, 2026
ModuleBuilder should just return the ModuleSignature Open

codegen

google/xls#236 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Remove numeric suffix of IR node names if possible Open

codegen

google/xls#251 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Add ability to stall feed forward pipeline Open

codegen enhancement

google/xls#255 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add capability to reuse expensive resources Open

optimizer

google/xls#256 · 7 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add DSLX optimization tests for is_pow2 Open

optimizer

google/xls#261 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Add formatter/linter config files Open

build

google/xls#262 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Create sample NoC with bidirectional tree specification that supports contiguous bursts Open

noc

google/xls#267 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Improve optimization of masking and updating of slices Open

optimizer

google/xls#273 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 16, 2026
Reorg optimization pipeline Open

optimizer

google/xls#274 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 16, 2026
DSLX type definitions are only permitted at module scope Open

dslx enhancement

google/xls#278 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Topology descriptions in Markdown form in the open source repo Open

documentation noc

google/xls#283 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Implement first-cut topology generation library Open

enhancement noc

google/xls#287 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026
Multi-port write register-file-like structure characterization Open

delay model

google/xls#288 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 16, 2026

google/xls

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