intel/llvm

View on GitHub

Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.

Stars: 1.5k
Forks: 854
Open beginner issues: 1
Indexed issues: 662
Avg merge: 3d 17h
Merged PRs (30d): 137

Dominant language: LLVM
License: No license data
Last GitHub push: Sep 15, 2026
Latest indexed: Sep 17, 2026
Contributing guide: Contributing guide
Code of conduct: Code of conduct
Beginner labels: help wanted good first issue

Open All

659 open issues indexed

Use libFuzzer with intel/llvm? Open

enhancement

intel/llvm#8027 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Poor Performance - Low bandwidth of SYCL kernel for Layer Normalization Open

bug cuda

intel/llvm#8030 · 14 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Find a sustainable way of enabling STL assertions Open

bug confirmed

intel/llvm#8044 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Better handling of `static` variables by `cgeist`. Open

enhancement sycl-mlir

intel/llvm#8076 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA] persistent L2 cache support Open

cuda enhancement

intel/llvm#8093 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[GHA] Windows build step reports incorrect status. Open

bug confirmed

intel/llvm#8094 · 5 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[L0][CUDA][HIP] Event dependency bug Open

bug cuda hip

intel/llvm#8132 · 12 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Kernel ID lookup should fail at link-time Open

bug confirmed

intel/llvm#8150 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
how to solve "hipErrorNoBinaryForGpu: Unable to find code object for all current devices!" in hip platform Open

bug hip

intel/llvm#8158 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Poor Performance - Very Low bandwidth of SYCL kernel for Batch Normalization Open

bug cuda

intel/llvm#8177 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
SYCL-CTS atomic_fence fails in post-commit Open

bug CTS cuda

intel/llvm#8221 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Warn about unused but bound placeholder accessors Open

enhancement help wanted

intel/llvm#8234 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA] ptxas fatal: complex floating-point functions Open

bug cuda

intel/llvm#8281 · 4 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Poor Performance - Very Low bandwidth of SYCL kernel for LRN Open

bug cuda performance

intel/llvm#8292 · 8 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Low Bandwidth Obtained for Pooling Kernels in SYCL Implementation Open

bug cuda performance

intel/llvm#8321 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Poor Performance - Very Low bandwidth of SYCL kernel for Shuffle Open

bug cuda performance

intel/llvm#8322 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA] Many SYCL CTS tests fail on CUDA Open

bug CTS cuda

intel/llvm#8339 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[OpenCL][x86_64] clang/lib/CodeGen/TargetInfo.cpp: function argument type <4 x i16> is coerced to double Open

bug confirmed

intel/llvm#8347 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Very slow linking with -fno-sycl-rdc Open

confirmed cuda enhancement hip performance

intel/llvm#8353 · 6 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[CUDA] One step compilation to PTX Open

confirmed enhancement

intel/llvm#8797 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Optimization: Reduce the number of pi_event-related PI calls Open

cuda enhancement hip performance runtime

intel/llvm#8390 · 9 comments · 2 reactions · 0 assignees · Indexed Sep 17, 2026
how to set gridSize and groupSize? Open

bug confirmed good first issue

intel/llvm#8404 · 5 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
how to resolve cannot find the kernel function? Open

bug hip

intel/llvm#8405 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA] Reductions with 1024+ elements crash with CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES Open

bug compiler confirmed cuda runtime

intel/llvm#8414 · 16 comments · 1 reaction · 2 assignees · Indexed Sep 17, 2026
[CI] Allow configuration script to override CI defaults. Open

confirmed infrastructure

intel/llvm#8538 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
AsyncHandler/default_async_handler.cpp fails in HIP CI Open

bug hip

intel/llvm#8555 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA]Massive runfail for CUDA SYCL CTS on unrelated commit Open

bug CTS cuda

intel/llvm#8556 · 5 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Huge slowdown of check-llvm in pre-commit Open

bug confirmed

intel/llvm#8563 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Improve atomics support Open

enhancement sycl-mlir

intel/llvm#8660 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
GPU emulator Open

confirmed enhancement

intel/llvm#8661 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
environment variable to set the order of a queue Open

confirmed enhancement

intel/llvm#8695 · 5 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Define pass to hold `scf` (and other dialects) canonicalization patterns defined in `polygeist` Open

enhancement sycl-mlir

intel/llvm#8700 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Drop `polygeist-opt` and `cgeist` unwanted extensions Open

enhancement sycl-mlir

intel/llvm#8701 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Placeholder for the follow-up tasks of #7468 Open

enhancement help wanted

intel/llvm#8771 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[CUDA] Test 'Assert/assert_in_multiple_tus.cpp' CI Failure Open

bug cuda

intel/llvm#8832 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Missing warning with clang-llvm compiler Open

cuda

intel/llvm#8836 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][HIP]Implement proper device queries for atomic_memory/fence_capabilities Open

enhancement hip

intel/llvm#8940 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][L0] Improve diagnostics for timed-out device Open

confirmed enhancement

intel/llvm#8969 · 3 comments · 1 reaction · 0 assignees · Indexed Sep 17, 2026
Сonsider building a debug configuration for Windows-specific precommit testing. Open

confirmed enhancement infrastructure

intel/llvm#9010 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
How to understand the piKernelCreate? Open

bug cuda hip

intel/llvm#9018 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] float_to_int8_rn function Open

confirmed enhancement

intel/llvm#9101 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] Add capability for sycl-ls to print out all device information/descriptors Open

confirmed enhancement

intel/llvm#9104 · 1 comment · 2 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL-MLIR] Add `polygeist.struct` Open

enhancement sycl-mlir

intel/llvm#9213 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL-MLIR][DetectReduction] Add loop versioning Open

enhancement sycl-mlir

intel/llvm#9214 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 17, 2026
C++ Modules Do Not Work with SYCL Open

confirmed enhancement

intel/llvm#9245 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Crash In NVidia 3060 cuda environment Open

bug cuda

intel/llvm#9433 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Wrapping an Accessor in a Struct Open

confirmed enhancement

intel/llvm#9434 · 2 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL-MLIR] Handle `CK_LValueToRValueBitCast` in cgeist codegen Open

enhancement sycl-mlir

intel/llvm#9448 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL-MLIR] Handle `CK_ZeroToOCLOpaqueType` in cgeist codegen Open

enhancement sycl-mlir

intel/llvm#9449 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL-MLIR] error: 'arith.extsi' op operation destroyed but still has uses Open

enhancement sycl-mlir

intel/llvm#9451 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026

intel/llvm

Get new issues in your inbox