intel/llvm

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Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.

Stars: 1.5k
Forks: 854
Open beginner issues: 1
Indexed issues: 662
Avg merge: 3d 17h
Merged PRs (30d): 137

Dominant language: LLVM
License: No license data
Last GitHub push: Sep 15, 2026
Latest indexed: Sep 17, 2026
Contributing guide: Contributing guide
Code of conduct: Code of conduct
Beginner labels: help wanted good first issue

Open All

662 open issues indexed

Check the dimensionality of the kernel Open

bug confirmed

intel/llvm#3743 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL] alloca in a kernel Open

confirmed enhancement

intel/llvm#3753 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Add AdditionalMember to set LangOptions for WorkGroupSize Open

bug confirmed

intel/llvm#3761 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Replace the call to `llvm::any_of()` instead of doing the loop manually Open

confirmed

intel/llvm#3784 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Assert in ScalarEvolution.cpp:4075 Open

bug confirmed

intel/llvm#3796 · 2 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Consider improving warnings.cpp LIT tests Open

confirmed enhancement good first issue

intel/llvm#3980 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Add Table Gen support to refactor of collectSYCLAttributes() Open

confirmed

intel/llvm#4094 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL] Add basic verification for accessor type Open

confirmed enhancement

intel/llvm#4109 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Do we need to add duplicate attributes Open

bug confirmed

intel/llvm#4119 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL] Need to fix warnings related to Doxygen documentation build Open

confirmed Documentation

intel/llvm#4140 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Constant memory optimization for CUDA backend Open

cuda enhancement performance

intel/llvm#4278 · 2 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL] Improve traceability of loading libraries Open

confirmed enhancement

intel/llvm#4371 · 12 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][GPU] Reducing stack frame usage for the "ranges and index space identifiers" Open

bug cuda performance

intel/llvm#4412 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] `platform()` return a platform with no device Open

bug confirmed runtime

intel/llvm#4544 · 3 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Automatically discover CUDA and HIP in configure.py Open

cuda enhancement hip

intel/llvm#4585 · 1 comment · 1 reaction · 0 assignees · Indexed Sep 17, 2026
[sycl] local_accessor problem (no template named 'local_accessor') Open

confirmed enhancement

intel/llvm#4713 · 6 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Application aborted when passing nullptr as a kernel argument on OpenCL backend Open

bug confirmed

intel/llvm#4969 · 7 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
SYCL compiler can not be installed in system default location Open

bug confirmed

intel/llvm#5142 · 1 comment · 0 reactions · 1 assignee · Indexed Sep 17, 2026
3 discard event tests fail on HIP backend Open

enhancement hip

intel/llvm#8810 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Support for pragmas in icpx Open

bug confirmed

intel/llvm#5207 · 4 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Deprecate/Remove -f[no-]sycl-use-bitcode Open

confirmed enhancement

intel/llvm#5262 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL][HIP] hip/amd device not found when building with hip Open

bug hip

intel/llvm#5314 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[RFC] Improve argument passing / Support some non device copiable types Open

confirmed enhancement

intel/llvm#5320 · 6 comments · 1 reaction · 1 assignee · Indexed Sep 17, 2026
Performance of L0 backend: Unable to see concurrent execution Open

bug confirmed performance

intel/llvm#5344 · 16 comments · 1 reaction · 1 assignee · Indexed Sep 17, 2026
Investigate why IntelFPGANumBanksAttr is generating twice during template instantiation with IntelFPGABankBitsAttr test cases Open

bug confirmed

intel/llvm#5350 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL][HIP][llvm-test-suite] Scheduler/MemObjRemapping.cpp test failed on unrelated changes Open

bug hip

intel/llvm#5361 · 4 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Investigate performance when using OpSubgroupShuffleUpINTEL for SYCL shuffles Open

enhancement hip performance

intel/llvm#5364 · 0 comments · 2 reactions · 0 assignees · Indexed Sep 17, 2026
[ESIMD] Discussion topics, possible enhancements Open

confirmed enhancement

intel/llvm#5367 · 0 comments · 5 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL] modf and sincos not compiling with sycl::half type Open

bug confirmed

intel/llvm#5418 · 3 comments · 1 reaction · 0 assignees · Indexed Sep 17, 2026
Regression/unoptimized_stream.cpp sporadically fails on AMD GPU Open

bug hip

intel/llvm#5466 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Compile-time definitions to detect used SYCL targets Open

confirmed enhancement

intel/llvm#5562 · 9 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
[SYCL][ESIMD][EMU] Atomicity control for ESIMD_EMULATOR plug-in Open

confirmed enhancement

intel/llvm#5599 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Unnecessary allocation in L0 plugin Open

confirmed enhancement

intel/llvm#5601 · 0 comments · 0 reactions · 2 assignees · Indexed Sep 17, 2026
What to do if I want to use Hip toolchain? Open

enhancement hip

intel/llvm#5625 · 7 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Enable CUDA builds and validation in GitHub Actions Open

confirmed enhancement infrastructure

intel/llvm#5644 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
SYCL::Plugin/level_zero_batch_event_status.cpp fails sporadically Open

bug confirmed

intel/llvm#8803 · 4 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
SYCL and OpenMP + cuda --- -fopenmp-targets=nvptx64-cuda makes unnamed lambda kernels not work Open

bug compiler cuda

intel/llvm#5804 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
Refactor attributes checking codes shared between Add and Merge functions Open

confirmed enhancement

intel/llvm#5805 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Why are incorrect attributes attached to redeclarations Open

confirmed

intel/llvm#5816 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Support buffer location on CUDA Open

cuda enhancement

intel/llvm#5827 · 10 comments · 1 reaction · 0 assignees · Indexed Sep 17, 2026
[SYCL][ESIMD][EMU] Memory access (de)serialization for buffer/image/slm Open

bug confirmed

intel/llvm#5863 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
why the variable is called Unevaluated when the context is actually constant evaluated? Open

confirmed

intel/llvm#5893 · 0 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
SYCL include path problem Open

confirmed enhancement

intel/llvm#5932 · 10 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Refractor device image registration into function calls Open

confirmed enhancement help wanted

intel/llvm#5938 · 0 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[CUDA] Linking shared library in debug mode crashes the linker Open

bug compiler confirmed cuda

intel/llvm#5980 · 31 comments · 0 reactions · 1 assignee · Indexed Sep 17, 2026
Cannot build with external Level Zero installation Open

bug confirmed

intel/llvm#5984 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][CUDA][HIP] Throw a runtime error with invalid sub-group size to kernel Open

bug hip runtime

intel/llvm#6103 · 21 comments · 1 reaction · 0 assignees · Indexed Sep 17, 2026
install question Open

confirmed enhancement

intel/llvm#6130 · 4 comments · 0 reactions · 0 assignees · Indexed Sep 17, 2026
I try to use the DPC++ with the cuda support to compile the dnnl but is comeout an error Open

bug cuda

intel/llvm#6138 · 1 comment · 0 reactions · 0 assignees · Indexed Sep 17, 2026
[SYCL][HIP][AMD] Using DPC++ with HIP AMD support in CMake based projects Open

enhancement hip

intel/llvm#6140 · 0 comments · 2 reactions · 0 assignees · Indexed Sep 17, 2026

intel/llvm

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