chipsalliance / chipsalliance/synlig

sv-tests that work for yosys but not for yosys with plugin

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Description

- [x] #415
- [x] typedef_test_8__bad
- [x] #253
- [x] #252
- [x] #254
- [x] #255
- [x] 22.5.1--define_expansion_18
- [x] #256
- [ ] #251
- [x] #360
- [x] #257
- [x] #258
- [ ] class_member_test_5
- [x] simple_genblk_port_shadow
- [x] #259
- [x] #527
- [x] #362
- [x] #515
- [x] #249
- [x] #361
- [ ] regress-sv_br_ml20180227_iv
- [x] simple_rotate
- [x] simple_module_scope_case
- [x] #363
- [x] #248
- [x] #247
- [ ] regress-sv_pr3366217a_iv
- [x] simple_loop_var_shadow
- [x] #260
- [x] #261
- [x] #262
- [x] simple_carryadd
- [x] #413
- [x] simple_partsel
- [x] regress-vlg_pr2358848_iv
- [x] #414
- [x] simple_genblk_collide
- [x] #263
- [x] regress-vlg_comp1000_iv
- [ ] diamond_relationship_parametrized
- [x] #364
- [x] #504
- [ ] typedef_test_28__bad
- [ ] regress-vlg_escape2b_iv
- [ ] unpack_stream_inv
- [x] #246
- [ ] regress-vlg_escape2a_iv
- [x] regress-vlg_pr2809288_iv
- [ ] regress-sv_sv_macro3b_iv
- [x] simple_vloghammer
- [x] integers-unsized-illegal
- [ ] parameter_type_conflict_unresolved
- [x] sva_extnets
- [x] #245
- [x] #244
- [ ] regress-vlg_pr2848986_iv
- [x] #243
- [ ] regress-sv_sv_default_port_value3_iv
- [ ] regress-sv_pr3534333_iv
- [x] memories_firrtl_938
- [x] regress-sv_named_begin_fail_iv
- [x] #242
- [x] #240
- [ ] regress-vlg_pr1704726a_iv
- [x] #233
- [x] #528
- [x] #232
- [ ] regress-vlg_escape2c_iv
- [x] #231
- [x] simple_genblk_order
- [ ] regress-vlg_undef_lval_select3c_iv
- [ ] regress-vlg_pr2728812c_iv
- [ ] regress-vlg_trior_iv
- [ ] regress-vlg_udp_delay_fail_iv
- [ ] regress-vlg_real_invalid_ops_iv
- [x] #416
- [ ] hdlconvertor_std2017_p234
- [ ] regress-sv_sv_queue_real_fail_iv
- [ ] regress-vlg_pr2728812b_iv
- [x] #417
- [x] #418
- [ ] regress-vlg_named_event_no_edges_iv
- [ ] regress-sv_sv_queue_string_fail_iv
- [ ] regress-vlg_undef_lval_select4c_iv
- [ ] regress-sv_wild_cmp_err_iv
- [ ] regress-vlg_pr3437290a_iv
- [ ] regress-vlg_pr1704726d_iv
- [ ] regress-sv_program5b_iv
- [ ] regress-sv_br_gh440_iv
- [x] #419
- [ ] regress-vlg_array_lval_select3b_iv
- [ ] regress-vlg_triand_iv
- [ ] regress-vlg_pr1701921_iv
- [ ] regress-sv_sv_port_default13_iv
- [ ] regress-vlg_pr1704726c_iv
- [ ] regress-vlg_array_lval_select4b_iv
- [ ] number_test_46
- [x] #421
- [x] #422
- [x] #423
- [ ] utd-sv_std-6.1.2-contassign2
- [ ] regress-vlg_br_gh163_iv
- [x] #424
- [ ] regress-vlg_pr1938138_iv
- [ ] regress-vlg_undef_lval_select3b_iv
- [ ] regress-vlg_pr3437290c_iv
- [ ] regress-vlg_undef_lval_select4b_iv
- [x] #505
- [ ] regress-vlg_pr1934744_iv
- [ ] regress-sv_bits_iv
- [ ] regress-vlg_br_gh533_iv
- [ ] regress-fsv_pr1963962_iv
- [ ] regress-vlg_onehot_iv
- [ ] regress-sv_br_gh530_iv
- [ ] regress-sv_sv_root_func_iv
- [ ] regress-vlg_scope4_iv
- [ ] regress-vlg_mangle_1_iv
- [ ] regress-vlg_dotinid_iv
- [ ] regress-vlg_pr2039694_iv
- [ ] regress-sv_br_gh527_iv
- [ ] regress-vlg_pr1449749a_iv
- [ ] regress-fsv_sys_func_task_error_iv
- [ ] regress-vlg_sys_func_task_error_iv
- [ ] regress-vlg_br916a_iv
- [ ] regress-vlg_pr1963962_iv
- [ ] regress-vlg_pr2688910_iv
- [ ] regress-vlg_param_select2_iv
- [ ] regress-vlg_string5_iv
- [ ] regress-vlg_pr2528915_iv
- [ ] regress-vlg_pr2166188_iv
- [ ] regress-sv_sv_root_task_iv
- [ ] regress-vlg_attrib07_func_call_iv
- [ ] regress-vlg_br1000_iv
- [ ] regress-vlg_div16_iv
- [ ] regress-vlg_pr941_iv
- [ ] regress-vlg_signed_equality_iv
- [ ] regress-vlg_attrib03_parameter_iv
- [ ] regress-vlg_check_constant_4_iv
- [ ] regress-vlg_pr1698499_iv
- [ ] regress-sv_bits2_iv

Here is a script that can be used in the future to find new tests:
```
#!/usr/bin/env python

import csv
from collections import defaultdict

data = defaultdict(set)

with open('report.csv') as csvfile:
report = csv.reader(csvfile, delimiter=',')
for row in report:
if row[3] == "True":
data[row[1]].add(row[0])

print('\n'.join(list(data['Yosys'].difference(data['VanillaYosysUhdmPlugin']))))
```

The `report.csv` file is generated by sv-tests. The file from the last build can be found here: https://github.com/chipsalliance/sv-tests-results/blob/gh-pages/report.csv

Contributor guide

No contributing guide indexed for this repository

Research direction

Start with the unchecked test names in the issue and the report.csv generated by sv-tests. Run the provided Python comparison against the latest report and inspect the Yosys versus VanillaYosysUhdmPlugin differences. Done means the relevant compatibility failures are resolved and the corresponding checklist entries can be checked.

Written by the indexing model from the issue text.

Assessment

Tech stack
python
Domain
compilers, testing-qa
Issue type
Bug
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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