chipsalliance / chipsalliance/VeeRwolf

Read access stops when read/write access is repeated

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#59 2 comments 0 reactions 0 assignees View on GitHub
Dominant language
Verilog
Stars
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Forks
75
PR merge metrics
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Description

Read access stops when read/write access is repeated.
Run the following program.

******************************************************************************************
.text
.align 4

.global acctest
//
//I=====================================================
//I Access test for chattering access problem
//I=====================================================
//I void acctest(unsigned int adr, unsigned int *in);
acctest:
csrrsi a2, mstatus, 0x08
lw a3, 0(a0)
sw a3, 0(a1)
csrrw zero, mstatus, a2
jalr zero, ra, 0 /* ret */

.end
******************************************************************************************

Read accesses stop, but write accesses continue.
I am running a simulation in VCS.

Contributor guide

No contributing guide indexed for this repository

Research direction

Start by reproducing the reported behavior in VCS with the assembly entry point acctest and its repeated read/write sequence. Inspect the simulation around the mstatus update and memory accesses to determine why reads stop while writes continue. Done means the cause is identified and the access behavior matches the intended result, which the issue does not yet specify.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
30/100

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