chipsalliance / chipsalliance/VeeRwolf

fusesoc run --target=basys3 with vivado 2021.2

Open
#51 5 comments 0 reactions 0 assignees View on GitHub
Dominant language
Verilog
Stars
343
Forks
75
PR merge metrics
No merged PRs in 30d

Description

/tools/Xilinx/Vivado/2021.2/bin/rdiArgs.sh: line 311: 8214 Killed "$RDI_PROG" "$@"
[Mon Nov 8 11:38:08 2021] synth_1 finished
WARNING: [Vivado 12-8222] Failed run(s) : 'synth_1'
wait_on_runs: Time (s): cpu = 00:01:22 ; elapsed = 00:19:07 . Memory (MB): peak = 2594.328 ; gain = 0.000 ; free physical = 212 ; free virtual = 1196
ERROR: [Common 17-70] Application Exception: Failed to launch run 'impl_1' due to failures in the following run(s):
synth_1
These failed run(s) need to be reset prior to launching 'impl_1' again

Contributor guide

No contributing guide indexed for this repository

Research direction

Reproduce `fusesoc run --target=basys3` with Vivado 2021.2 and review the reported `rdiArgs.sh` failure, the `synth_1` status, and the available memory shown in the log. Done means the target completes synthesis and implementation without the reported launch failure.

Written by the indexing model from the issue text.

Assessment

Domain
build-system
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.