oneapi-src / oneapi-src/oneAPI-samples

FPGA tests don't all work using Quartus

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bug
主要语言
C++
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描述

Summary

The board_test example (and other examples I've tested) from DirectProgramming/C++SYCL_FPGA/ReferenceDesigns fails on the part of the test that tries to extract the reference frequency using the aocl binedit functionality.

Version

Report oneAPI Toolkit version and oneAPI Sample version or hash.

oneAPI version 2022.0.2
quartus version 20.4
oneAPI sample hash f6660eef7007d0acb7de1bce9c6e5844c6615a80

Environment

Intel Stratix 10, Bittware N520 MX

Steps to reproduce

cd ~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/board_test
mkdir build
cd build
cmake .. -DFPGA_BOARD=s10mx:p520_hpc_m210h_g3x16
make fpga
./board_test.fpga

Observed behavior

When compiled and run the board_test.fpga executable fails, with this output at the end of the run:

*****************************************************************
*******************  Kernel Clock Frequency Test  ***************
*****************************************************************

terminate called after throwing an instance of 'std::logic_error'
  what():  basic_string::_M_construct null not valid

Digging into the code it is because this functionality:

   std::string temp_cmd = "aocl binedit " + kBinaryName + " print .acl.quartus_report";
   const char *open_cmd_rep = temp_cmd.c_str();

Doesn't actually work. The executable (board_test.fpga) does not have anything to report when using 1aocl binedit board_test.fpga list, i.e. it produces an empty output:

Sections in package file:

This can be fixed by changing the command to this:

   std::string temp_cmd = "aocl binedit " + kBinaryName + ".prj/base.aocx" + " print .acl.quartus_report";
   const char *open_cmd_rep = temp_cmd.c_str();

Which then can be used to extract the reference FPGA frequency.

I can commit this as a pull request.

Expected behavior

The board_test to run without issues.

贡献指南

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  3. Fork 仓库,在一个分支上完成修改。
  4. 提交 Pull Request,并在描述里引用这个 Issue 编号。

调研方向

从 DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/board_test 开始,查找报告中所示的 kBinaryName 或 aocl binedit 用法。使用提供的 CMake 和 make 命令在所述 FPGA 设置上重现该问题,然后验证 board_test.fpga 是否在没有 logic_error 的情况下完成 Kernel Clock Frequency Test,并报告参考频率。

由索引模型根据 Issue 内容生成。

评估

技术栈
cmake, cpp
领域
embedded-iot, testing-qa
Issue 类型
缺陷
难度
2/5
预计耗时
1-3 小时
活跃度
停滞
描述清晰度
描述清楚
新手友好度
48/100

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