[ImportVerilog] Functionality for real number format specifiers not defined
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ImportVerilog
- Dominant language
- C++
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Description
I initially added added some basic support for real number format specifiers in PR #8848 some months ago. Due to school I have been busy and unable to follow up. I believe the functionality still needs to be implemented. I apologize for forgetting about this until now. More info at IEEE 1800-2017 § 21.2.1.2 "Format specifications".
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Research direction
Start by reviewing PR #8848 and the current ImportVerilog implementation, then read IEEE 1800-2017 §21.2.1.2, “Format specifications.” Determine which real-number format specifiers remain unsupported and define completion against the standard’s expected behavior.
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Assessment
- Tech stack
- cpp
- Domain
- compilers
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 30/100