[ExportVerilog] Support `math.ipowi` operation

Nobody has claimed this yet.

The following Verilog currently fails to round-trip through `circt-verilog | circt-opt --lower-seq-to-sv --export-verilog`:
```systemverilog
module binary_ops_00000105(a, y);
input [3:0] a;
output [4:0] y;
assign y = 4'd2 ** a;
endmodule
```
Error:
```
syn_circt/binary_ops_00000105.mlir:6:10: error: dialect "math" not supported for direct Verilog emission
%1 = math.ipowi %c2_i6, %0 : i6
^
syn_circt/binary_ops_00000105.mlir:6:10: note: see current operation: %3 = "math.ipowi"(%0, %2) : (i6, i6) -> i6
syn_circt/binary_ops_00000105.mlir:6:10: note: ExportVerilog cannot emit this operation; it needs to be lowered before running ExportVerilog
```
I don't think we have ever run into a need to have `**` emitted back to Verilog before. There is no op in the Comb dialect to represent `**`, which is why ImportVerilog uses `math.ipowi`. It might be worthwhile adding direct support for `math.ipowi` to ExportVerilog for the few cases where this comes up.

Start by tracing how ImportVerilog represents the `**` expression as `math.ipowi`, then inspect the ExportVerilog path reached by `circt-opt --lower-seq-to-sv --export-verilog`. Reproduce the failure with the provided `binary_ops_00000105` module and verify that the round trip completes with the exponentiation preserved in emitted Verilog.

Written by the indexing model from the issue text.