[circt-test] sby runner doesn't fail if module doesn't exist

Using the sby runner on Verilog input with a top-level module that does not exist does not produce a proper failure or exit code.

Start by locating the sby runner in circt-test and reproduce the case with Verilog input whose top-level module does not exist. Trace how that condition is reported and how the runner determines its exit status. Done means the missing-module case produces a proper failure and non-success exit code.

Written by the indexing model from the issue text.