llvm / llvm/circt

[FIRRTL] memory parsing support for combined port declarations - document/spec, comma-separate?

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FIRRTL
Dominant language
C++
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Description

Consider:

```firrtl
FIRRTL version 4.0.0

circuit Foo:
public module Foo:
mem memory:
data-type => UInt<8>
depth => 8
reader => foo bar baz
read-latency => 0
write-latency => 1
read-under-write => undefined
```

This is apparently the same as having three `reader =>` lines for each of `foo`, `bar`, and `baz`.

This dates back to at least https://github.com/llvm/circt/commit/d11f90d63a802fcb4541563ecef2a920a57881d7 which seems to have that in some test input.

This syntax is not in the FIRRTL spec, is this used / desired?

If so, with commas now mandatory this seems like a good candidate for readability.

Contributor guide

No contributing guide indexed for this repository

Research direction

Start with the FIRRTL specification and the test input referenced by commit d11f90d63a802fcb4541563ecef2a920a57881d7. Determine whether combined reader declarations are supported and whether comma separation should be required, then document the decided syntax or clarify the specification.

Written by the indexing model from the issue text.

Assessment

Domain
compilers, documentation
Issue type
Documentation
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
35/100

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