[ImportVerilog] Make AST traveral non-recursive
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ImportVerilog
- Dominant language
- C++
- Stars
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- Merged PRs (30d)
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Description
As suggested in a discussion in PR #6773, consider turning the AST visitors in ImportVerilog into a non-recursive, worklist-based implementation.
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reading the discussion in PR #6773 and locating the AST visitors in ImportVerilog. Define the worklist-based traversal scope and the behavioral checks needed to show that traversal remains equivalent without recursion; the issue provides no file or test entry point.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- compilers
- Issue type
- Refactor
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100