[FIRRTL][IMDCE] Annotations on ports are not preserved when moving to wires

Input:

// -----
// Test that annotations keep ports alive.
// CHECK-LABEL: "AnnoAlivePort"
firrtl.circuit "AnnoAlivePort" {
  // CHECK: module private @AnnoPort
  firrtl.module private @AnnoPort(out %dead : !firrtl.uint<5> [{class = "circt.test"}]) {}
  firrtl.module @AnnoAlivePort() {
    // CHECK: firrtl.instance
    %inst_dead = firrtl.instance inst @AnnoPort(out dead : !firrtl.uint<5>)
  }
}

The port is dead at instantiation sites but alive within the module, so port is dropped and wire is created for it (maybe it's written/read locally, so on).

Looks like annotations are not moved to the wire, however, here's the current output pointing IMDCE at the above:

firrtl.circuit "AnnoAlivePort" {
  firrtl.module private @AnnoPort() {
    %0 = firrtl.wire : !firrtl.uint<5>
  }
  firrtl.module @AnnoAlivePort() {
    firrtl.instance inst @AnnoPort()
  }
}

cc #6046 for more discussion on annotations and IMDCE, but not directly related.

Start with the IMDCE pass and reproduce the issue using the provided MLIR input, focusing on the port-to-wire transformation. Done means the port annotation is preserved on the generated wire and the resulting IR matches the intended checks.