[RegisterOptimization] Need fixpoint iteration?

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Since RegisterOptimization processes each register only once, the pass cannot optimizes the following IR (which IMCP was able to optimize):

```mlir
// circt-opt -pass-pipeline='builtin.module(firrtl.circuit(firrtl.module(firrtl-register-optimizer)))'
firrtl.circuit "Top" {
firrtl.module @Top(in %a: !firrtl.uint<1>, in %clock: !firrtl.clock, out %b: !firrtl.uint<1>) {
%r1 = firrtl.reg %clock : !firrtl.clock, !firrtl.uint<1>
%r2 = firrtl.reg %clock : !firrtl.clock, !firrtl.uint<1>
firrtl.strictconnect %r1, %r2 : !firrtl.uint<1>
%c0_ui1 = firrtl.constant 0 : !firrtl.uint<1>
firrtl.strictconnect %r2, %c0_ui1 : !firrtl.uint<1>
firrtl.strictconnect %b, %r1 : !firrtl.uint<1>
}
}
```

Start by reproducing the provided FIRRTL IR with the circt-opt pass pipeline and then read the RegisterOptimization pass implementation. The work is done when the pass can repeatedly process registers until the example reaches the same optimization result that IMCP produced.

Written by the indexing model from the issue text.