[FIRRTL] Improve Error Message on Uninferred Reset of Uninstantiated Module
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Description
Currently, the following FIRRTL Circuit will fail in `InferResets` because of an uninstantiated module. This error is somewhat confusing and it would be better to also indicate that this module is uninstantiated:
```
circuit Foo :
module Bar :
input clock : Clock
input reset : Reset
skip
module Foo :
skip
```
This currently produces:
```
# firtool Tmp.fir
Tmp.fir:2:10: error: 'firrtl.module' op has an abstract reset type port "reset" after InferResets
module Bar :
^
```
h/t @cedric-orban
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Research direction
Start with the InferResets pass and the firtool diagnostic shown in the issue, using the provided FIRRTL circuit as a reproducer. Update the error so it also identifies that the module is uninstantiated, then rerun firtool on the example and verify the diagnostic is clearer.
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Assessment
- Tech stack
- cpp
- Domain
- compilers
- Issue type
- Bug
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 45/100