[FIRRTL][Verilog] Use Xcelium Coverage Exclusion Magic in Addition to VCS

Currently we only emit extracted covers with the VCS magic file-level comment to exclude them:

```
// VCS coverage exclude file
...
```

However, anywhere we emit this, we should also emit the Xcelium magic off/on comments. Xcelium looks like:

```
// pragma coverage block = off, toggle = off
...
// pragma coverage block = on, toggle = on
```

I am not super stoked about this option (and also note that the Xcelium pragmas I've been given are turning off specific types of coverage which may not be the case for all users 🥲 ) and would like to have a better mechanism to indicate that something is a cover, what file it should go to, and what simulators you are using so that we aren't just dropping verbatim Verilog comments all over the place.

Locate the code that emits the "VCS coverage exclude file" comment for extracted covers. Check how generated Verilog represents each extracted cover, then ensure the corresponding Xcelium off/on comments are emitted alongside it and verify that all existing cover outputs are covered.

Written by the indexing model from the issue text.