[HW] Dead values with cyclic dependencies are not removed by DCE

Nobody has claimed this yet.

Consider the following IR. This is a simple flip flop and it is dead (%o1 and %o2 are never connected to other values). DCE (`circt-opt -canonicalize`) cannot remove them because their uses are hold by each other.

```mlir
hw.module @Dead_FF(%clk : i1, %D: i1) -> () {
%c1 = hw.constant 1 : i1
%Dn = comb.xor %D, %c1 : i1
%t1 = comb.and %Dn, %clk : i1
%t2 = comb.and %D, %clk : i1
%u1 = comb.or %t1, %o2 : i1
%u2 = comb.or %t2, %o1 : i1
%o1 = comb.xor %u1, %c1 : i1
%o2 = comb.xor %u2, %c1 : i1
hw.output
}
```
Current output:
```verilog
module Dead_FF( // foo.mlir:1:1
input clk,
D);

wire _GEN; // foo.mlir:10:8
wire _GEN_0; // foo.mlir:9:8

assign _GEN_0 = ~(~D & clk | _GEN); // foo.mlir:4:8, :5:8, :7:8, :9:8, :10:8
assign _GEN = ~(D & clk | _GEN_0); // foo.mlir:6:8, :8:8, :9:8, :10:8
endmodule
```

Start by running the provided MLIR reproducer with `circt-opt -canonicalize` and compare its output with the shown Verilog. Trace the dead-code elimination behavior for values whose uses form a cycle. Done means the unused cyclic values and their generated wires are removed without affecting live outputs.

Written by the indexing model from the issue text.