Non-handhsake inter-module and host communication interfaces

Nobody has claimed this yet.

I could not find a specific issue dealing with this topic so I am just creating a new one. If there is, feel free to reference it here and I will close this one.

My questions is on the current status of adding a standardized interface wrapper to modules generated using the CIRCT flow.

Currently, I am taking the RTL generated by CIRCT and adding all the additional components necessary to talk to the kernel via AXI manually. This allows me to connect AXI-based IP to it and more importantly, drive the kernel either via MMIO (requires sudo access) or even OpenCL using XRT.

I know ESI from @teqdruid is looking to achieve something similar to AXI (interconnect modules) but I am not sure on the status of the project or if it will be AXI compatible in a way.

Thanks in advance!

The issue mentions RTL generated through the CIRCT flow, ESI, AXI, MMIO, OpenCL, and XRT, but names no files, tests, or entry points. Start by reviewing current ESI documentation and related issues to establish the status and desired AXI compatibility; a concrete scope and implementation target would be needed before work can be considered done.

Written by the indexing model from the issue text.