f4pga / f4pga/f4pga-arch-defs

Write a Python library for decoding Xilinx Series 7 wire names

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arch-xc7 good first issue help wanted lang-python type-utils
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Description

The names of wires in the series-7 FPGA have meaning, for example `SW4BEG0` might mean 'the beginning of a wire which runs south west 4 tiles'.

There is the start of some code here -> https://github.com/SymbiFlow/symbiflow-arch-defs/blob/474d3ed44647c1dc53eafddb16ba9eb0e025506a/artix7/utils/prjxray-routing-import.py#L308-L343

The [Project X-Ray `tileconn.json`](https://github.com/SymbiFlow/prjxray-db/blob/master/artix7/tileconn.json) has a list of names we know.

But it would nice to have a proper library with tests and such.

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