FusedMultiplyAdd (FMA) default to vfmadd213, even in situation where 231 (I think) should be preferred

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Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
38/100
Issue type
Bug
Clarity
Mostly clear
Activity status
Stale
Tech stack
csharp

Research direction

Start by reproducing Is213_ButShouldBe231 with System.Runtime.Intrinsics.Fma.MultiplyAdd on .NET 8 and compare the generated assembly with the expected vfmadd231ps sequence. Trace the JIT's FMA lowering and register-allocation behavior; done means the redundant moves and repeated loads are removed for this case, with coverage added to the relevant JIT tests if an existing test area is identified.

Written by the indexing model from the issue text.

Description

area-CodeGen-coreclr
Description

Using c = Fma.MultiplyAdd(a, b, c), the codegen seems to make some redundant register move.
This bug is closely related to:

  • This issue #12984
  • The bug the following PR was trying to fix : dotnet/coreclr#25387

I did not write a lot of bug report, so don't hesitate if more information is needed.

Reproduction Steps
public static Vector256<float> Is213_ButShouldBe231(Vector256<float> columnC, Vector256<float> columnA, Vector256<float> rowB)
{
    // vfmadd132ps scr1, src2, src3/mem => src1 = (src1 * src3/mem) + src2
    // vfmadd213ps scr1, src2, src3/mem => src1 = (src2 * src1) + src3/mem
    // vfmadd231ps scr1, src2, src3/mem => src1 = (src2 * src3/mem) + src1
    // Fma.MultiplyAdd(src1, src2, src3) := (src1 * src2) + src3
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    columnC = Fma.MultiplyAdd(columnA, rowB, columnC);
    return columnC;
}
Expected behavior

I would expect something like:

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 

G_M000_IG02:                ;; offset=0x0003
       vmovups  ymm0, ymmword ptr [rdx]
       vmovups  ymm1, ymmword ptr [r8]
       vmovups  ymm2, ymmword ptr [r9]
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
       vfmadd231ps ymm0, ymm1, ymm2
      vmovups  ymmword ptr [rcx], ymm0
       mov      rax, rcx

G_M000_IG03:                ;; offset=0x009E
       vzeroupper 
       ret      
Actual behavior

From Disasmo (Visual Studio 2022 Extension):

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 

G_M000_IG02:                ;; offset=0x0003
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rdx], ymm0
       vmovups  ymm0, ymmword ptr [r8]
       vmovups  ymm1, ymmword ptr [r9]
       vfmadd213ps ymm0, ymm1, ymmword ptr [rdx]
       vmovups  ymmword ptr [rcx], ymm0
       mov      rax, rcx

G_M000_IG03:                ;; offset=0x009E
       vzeroupper 
       ret      
; Total bytes of code: 162

From Sharplab.io, using Code: main (11 jun 2024) and Results: JIT Asm:

C.Is213_ButShouldBe231(System.Runtime.Intrinsics.Vector256`1<Single>, System.Runtime.Intrinsics.Vector256`1<Single>, System.Runtime.Intrinsics.Vector256`1<Single>)
    L0000: vzeroupper
    L0003: vmovups ymm2, [esp+0x44]
    L0009: vmovups ymm0, [esp+0x24]
    L000f: vmovups ymm1, [esp+4]
    L0015: vfmadd231ps ymm2, ymm1, ymm0
    L001a: vmovaps ymm3, ymm0
    L001e: vfmadd213ps ymm3, ymm1, ymm2
    L0023: vmovaps ymm2, ymm0
    L0027: vfmadd213ps ymm2, ymm1, ymm3
    L002c: vmovaps ymm3, ymm0
    L0030: vfmadd213ps ymm3, ymm1, ymm2
    L0035: vmovaps ymm2, ymm0
    L0039: vfmadd213ps ymm2, ymm1, ymm3
    L003e: vmovaps ymm3, ymm0
    L0042: vfmadd213ps ymm3, ymm1, ymm2
    L0047: vmovaps ymm2, ymm3
    L004b: vmovaps ymm3, ymm0
    L004f: vfmadd213ps ymm3, ymm1, ymm2
    L0054: vfmadd213ps ymm0, ymm1, ymm3
    L0059: vmovups [ecx], ymm0
    L005d: vzeroupper
    L0060: ret 0x60
Regression?

No response

Known Workarounds

Don't know any

Configuration

Project: .Net 8
My CPU: Ryzen 5 2600,
OS: Windows 11, version 23h2.

Other information

No response

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