chipsalliance / chipsalliance/usb2
[DV] Add Verification Test Cases for Memory Safety and Security Rules
- Dominant language
- VHDL
- Stars
- 1
- Forks
- 6
- Avg merge
- 4d 13h
- Merged PRs (30d)
- 4
Description
Let's make sure we have defined test cases for all these rules including the ones in memory safety and security; I see verif requirements below, probably these all shld also be added
_Originally posted by @bharatpillilli in https://github.com/chipsalliance/usb2/pull/3#discussion_r3831741110_
Contributor guide
No contributing guide indexed for this repository
Research direction
The issue does not name files, tests, or verification entry points. First locate the referenced verification requirements and existing test cases, then determine which memory-safety and security rules are missing; done means each applicable rule has a defined test case.
Written by the indexing model from the issue text.
Assessment
- Domain
- security, testing
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Active
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100