chipsalliance / chipsalliance/rocket-chip

comment and code discrepancy

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#3,734 0 comments 0 reactions 0 assignees View on GitHub
Dominant language
Scala
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Description

In FPU.scala:
```
// we don't currently support round-max-magnitude (rm=4)
io.illegal_rm := io.inst(14,12).isOneOf(5.U, 6.U) || io.inst(14,12) === 7.U && io.fcsr_rm >= 5.U

```
It seems that rm=4(round to nearesr, with tie to Max magnitude) is currently supported.

Contributor guide

Open the contributing guide

Research direction

Start in FPU.scala by checking the illegal_rm logic against the RISC-V rounding-mode definitions, especially rm=4. Update the discrepancy so the comment accurately describes the behavior, then run the relevant FPU or Rocket Chip tests if available to confirm the change.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
embedded-iot
Issue type
Documentation
Difficulty
1/5
Estimated time
Under an hour
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
55/100

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