chipsalliance / chipsalliance/rocket-chip

Adding prefetchers causes rocket core to hang in firmware

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Description

Chipyard Version and Hash
Release: 1.13.0
Hash: 9975582d

OS Setup
5.15.0-131-generic https://github.com/ucb-bar/chipyard/pull/141-Ubuntu SMP Fri Jan 10 21:18:28 UTC 2025 x86_64 x86_64 x86_64 GNU/Linux
No LSB modules are available.
Distributor ID: Ubuntu
Description: Ubuntu 22.04.4 LTS
Release: 22.04
Codename: jammy

Current Behavior
I have created a TargetConfig with the RocketPrefetching config as follows

`
class SingleRocketConfigWRME4Prefetch extends Config(
new freechips.rocketchip.subsystem.WithNBanks(1) ++
new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=16, capacityKB=1024) ++
new freechips.rocketchip.subsystem.WithExtMemSize((1 << 30) * 4L) ++
new WithDefaultFireSimBridges ++
new WithFireSimConfigTweaks ++
new chipyard.PrefetchingRocketConfig)

I have also used this config but only using:
new barf.WithHellaCachePrefetcher(Seq(0), barf.SingleStridedPrefetcherParams()) ++
freechips.rocketchip.rocket.WithL1DCacheNonblocking(2) ++
new freechips.rocketchip.rocket.WithNHugeCores(1) ++
`

and both hang at the same point in OpenSBI. The output is as follows

`
Script started on 2025-02-27 11:46:45-06:00 [TERM="screen" TTY="/dev/pts/7" COLUMNS="80" LINES="24"]
+domain found: 0x0000
+bus found: 0x05
+device found: 0x00
+function found: 0x0
+bar found: 0x0
Using: 0000:05:00.0, BAR ID: 0, PCI Vendor ID: 0x10ee, PCI Device ID: 0x903f
Opening /sys/bus/pci/devices/0000:05:00.0/vendor
Opening /sys/bus/pci/devices/0000:05:00.0/device
examining xdma/.
examining xdma/..
examining xdma/xdma0_h2c_0
Using xdma write queue: /dev/xdma0_h2c_0
Using xdma read queue: /dev/xdma0_c2h_0
widget_registry_t::add_widget(StreamEngine)
cpu2fpga: 0, fpga2cpu: 2
UART0 is here (stdin/stdout).
TraceRV 0: Tracing disabled, since +tracefile was not provided.
command line for program 0. argc=26:
+permissive +macaddr0=00:12:6D:00:00:02 +blkdev0=rme0-rme.img +niclog0=niclog0 +blkdev-log0=blkdev-log0 +trace-select=1 +trace-start=0 +trace-end=-1 +trace-output-format=0 +dwarf-file-name=rme0-rme-bin-dwarf +autocounter-readrate=0 +autocounter-filename-base=AUTOCOUNTERFILE +print-start=0 +print-end=-1 +linklatency0=6405 +netbw0=200 +shmemportname0=default +domain=0x0000 +bus=0x05 +device=0x00 +function=0x0 +bar=0x0 +pci-vendor=0x10ee +pci-device=0x903f +permissive-off rme0-rme-bin
FireSim fingerprint: 0x46697265
TracerV: Trigger enabled from 0 to 18446744073709551615 cycles
Commencing simulation.
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick
tsibridge_t::tick skipping tick

OpenSBI v1.2

/ __ \ / | _ _ |
| | | | __ ___ _ __ | ( | |) || |
| | | | '_ \ / _ \ '_ \ ___ | _ < | |
| || | |) | __/ | | |) | |) || |
_/| ./ _|| ||/|/___|
| |
|_|

fdt_resv_memory_update_node() found address-cells : 2, size-cells: 2
fdt_resv_memory_update_node() found address-cells : 2, size-cells: 2
Platform Name : ucb-bar,chipyard
Platform Features : medeleg
Platform HART Count : 1
Platform IPI Device : aclint-mswi
Platform Timer Device : aclint-mtimer @ 1000000Hz
Platform Console Device : sifive_uart
Platform HSM Device : ---
Platform PMU Device : ---
Platform Reboot Device : htif
Platform Shutdown Device : htif
Platform Suspend Device : ---
Firmware Base : 0x80000000
Firmware Size : 360 KB
Firmware RW Offset : 0x40000
Runtime SBI Version : 1.0

Domain0 Name : root
Domain0 Boot HART : 0
Domain0 HARTs : 0*
Domain0 Region00 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
Domain0 Region01 : 0x0000000080040000-0x000000008005ffff M: (R,W) S/U: ()
Domain0 Region02 : 0x0000000080000000-0x000000008003ffff M: (R,X) S/U: ()
Domain0 Region03 : 0x0000000000000000-0xffffffffffffffff M: (R,W,X) S/U: (R,W,X)
Domain0 Next Address : 0x0000000080200000
Domain0 Next Arg1 : 0x0000000081600000
Domain0 Next Mode : S-mode
Domain0 SysReset : yes
Domain0 SysSuspend : yes

Boot HART ID : 0
Boot HART Domain : root
Boot HART Priv Version : v1.12
Boot HART Base ISA : rv64imafdcx
Boot HART ISA Extensions : none
Boot HART PMP Count : 8
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 31
Boot HART MHPM Count : 0
Boot HART MIDELEG : 0x0000000000000222
Boot HART MEDELEG : 0x000000000000b109
`
At this point the hang occurs.

Contributor guide

Open the contributing guide

Research direction

Start by reproducing the hang with the two TargetConfig variants described in the issue and compare their behavior at the reported OpenSBI output. Inspect the RocketPrefetching configuration, WithHellaCachePrefetcher setup, and FireSim/OpenSBI startup path; done means identifying why firmware stops after the domain information and providing a verified correction or narrowed failure cause.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
embedded-iot
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
35/100

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