chipsalliance / chipsalliance/rocket-chip

Spike and rocket's csr registers behave differently

Open
#3,697 0 comments 0 reactions 0 assignees View on GitHub
Dominant language
Scala
Stars
3.9k
Forks
1.3k
Avg merge
5d 13m
Merged PRs (30d)
1

Description

Hi, I found a problem, when executing the ecall instruction after another exception cause, spike and rocket behave differently, in rocket it doesn't update the value of mstatus as well as other registers, while spike does.

Contributor guide

Open the contributing guide

Research direction

Reproduce the reported sequence: execute ecall after another exception cause and compare Rocket with Spike. Trace the CSR handling involved in mstatus and the other registers; done means Rocket and Spike exhibit the same register updates for this case.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
embedded-iot
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.