chipsalliance / chipsalliance/rocket-chip
Spike and rocket's csr registers behave differently
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- Dominant language
- Scala
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Description
Hi, I found a problem, when executing the ecall instruction after another exception cause, spike and rocket behave differently, in rocket it doesn't update the value of mstatus as well as other registers, while spike does.
Contributor guide
Research direction
Reproduce the reported sequence: execute ecall after another exception cause and compare Rocket with Spike. Trace the CSR handling involved in mstatus and the other registers; done means Rocket and Spike exhibit the same register updates for this case.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100