What files should I use in FPGA implemantation?

I have completed the rocket-chip installation. But which verilog files or files will I use when synthesizing FPGA in vivado.I used freechips.rocketchip.system.DefaultFPGAConfig.behav_srams.v
freechips.rocketchip.system.DefaultFPGAConfig.v
plusarg_reader.v
EICG_wrapper.v
SimDTM.v
But i get error in SimDTM.v .

Start by reviewing the listed generated files—DefaultFPGAConfig.behav_srams.v, DefaultFPGAConfig.v, plusarg_reader.v, EICG_wrapper.v, and SimDTM.v—and the SimDTM.v error from Vivado. Determine which generated files are intended for FPGA synthesis and what change or configuration is needed for synthesis to complete.

Written by the indexing model from the issue text.