chipsalliance / chipsalliance/rocket-chip
How to make PC never wait for ICache
- Dominant language
- Scala
- Stars
- 3.9k
- Forks
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- 5d 13m
- Merged PRs (30d)
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Description
I found that the PC will stop for quite a long time(40+ cycles) if the RISCV finish 64Bytes instruction, because it will read new instruction from memory.
I have try many may method to make the stop time disappear, such as make the ICache size bigger but fail.
Is there any method to enhance the speed of RISCV faster? I don't want to wait for 40+ cycles only for waiting ICache load data
Contributor guide
Research direction
The issue names no files, tests, or entry points. Start by locating the PC and ICache refill path in Rocket Chip, then measure the reported 40+ cycle stall when fetching another 64-byte instruction block; done should mean a documented, measured reduction or removal of that wait.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- performance
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100