chipsalliance / chipsalliance/rocket-chip
makeSinglePortedByteWriteSeqMem a misnomer
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proposal
question
- Dominant language
- Scala
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Description
Type of issue: code quality
Impact: no functional change
Development Phase: request
Other information
makeSinglePortedByteWriteSeqMem in DiplomaticSRAM seems to be a misnomer. Nothing enforces that the mem be single ported, and the users seem to generate dual-ported srams. I think it should probably be changed to makeByteWriteSeqMem.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by locating makeSinglePortedByteWriteSeqMem in DiplomaticSRAM and searching for all of its users. Rename the helper to makeByteWriteSeqMem, update its references, and verify that the change is naming-only and does not alter the generated memory behavior.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- tooling
- Issue type
- Refactor
- Difficulty
- 2/5
- Estimated time
- 1-3 hours
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 45/100