How to make specific address region(s) of memory non-cachable?

Say, for example, my main memory goes from `0x8000_0000` to `0x81ff_ffff`. I want a portion at the end, `0x81ff_0000` - `0x81ff_ffff`, to be **non-cachable**, i.e. all read/write accesses should operate directly on memory. The other region (`0x8000_0000` - `0x81fe_ffff`) is cachable as usual.

Is that possible?

The issue names no files, tests, or entry points. Start by locating Rocket Chip’s handling of cacheability for address ranges; done means confirming whether 0x81ff_0000–0x81ff_ffff can be made non-cacheable while the rest remains cacheable.

Written by the indexing model from the issue text.