chipsalliance / chipsalliance/rocket-chip
how to obtain cache miss rate when run a simple c code, e.g. median in riscv-tests, on any architecture configuration?
- Dominant language
- Scala
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Description
hi
is there a way to use performance counters described in rocket-chip/src/main/scala/rocket/RocketCore.scala
on specific architecture configuration, i want to measure cache miss rate and some other performance related parameters for input c code, e.g. median in riscv-tests?
I would be grateful if you could tell me how to use it in detail or if you can give me some reference about that.
Contributor guide
Research direction
Start with rocket-chip/src/main/scala/rocket/RocketCore.scala and the median example in riscv-tests. Determine how the performance counters apply to a selected architecture configuration and what steps are needed to measure cache misses for the C program. Done means providing clear usage instructions or references for obtaining cache miss rate and related performance parameters.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- c, scala
- Domain
- performance
- Issue type
- Documentation
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100