chipsalliance / chipsalliance/rocket-chip
Make Linux run on top of the rocket-chip
- Dominant language
- Scala
- Stars
- 3.9k
- Forks
- 1.3k
- Avg merge
- 5d 13m
- Merged PRs (30d)
- 1
Description
Dear community,
First of all I want to say thank you for creating this project!
I am a total newcomer to everything related to RISC-V and I find it hard to get started.
So here is what I want to do. I want to have a fully functional Linux on my zedboard. I already looked into [fpga-zynq](https://github.com/ucb-bar/fpga-zynq), but I found that it was terribly outdated and I ended up fixing more than what I solved. Also I want to understand what is going on and not just execute some magic make scripts to make everything running.
I have experience with VHDL and Verilog. Personally I have a strong security background, but I am not a hardware engineer. I am very eager to learn, but right now I hope to be pointed in the right direction.
The problems I have encountered so far: With [fpga-zynq](https://github.com/ucb-bar/fpga-zynq) I ended up fixing more linking problems to make the scripts work to build u-boot, riscv-fesvr and everything for the ARM processor. Also I personally do not want to use the ARM processor. From my understanding it can simplify the process, but is not necessary. I understand that the [riscv-pk](https://github.com/riscv/riscv-pk) simplifies making programs run, but it should not be necessary?
I also stumbled across [riscv_vhdl](https://github.com/sergeykhbr/riscv_vhdl), which looks very interesting as well.
From my general understanding. It should be possible to to generate my own rocket-core and make it run. So far I generated the chip, ran all the tests I could and generated the synthesizable Verilog file, which I imported to Vivado. I removed all the TestHarness stuff, so I was left with just the rocket-chip. I understand that I need an MMU, which should be built directly with default configuration, right?
What are the next steps? How can I connect everything. I probably need some DDR connected.
I also found [freedom](https://github.com/sifive/freedom). Is this worth looking more into for me? I probably can create my own fpag-shell for the Zedboard, but is this eventually going to help me achieve my objective to get Linux running?
It might be easier to get started by generating a chip and execute like a small program that transmits some stuff via UART? But how can I do that?
Please point me in some directions. I am very eager to learn, but right now I feel very overwhelmed, with the variety of tools projects available. Probably someone has already done what I want, but google didn't help me much.
Thanks!
Contributor guide
Research direction
Start by comparing the fpga-zynq, riscv-pk, riscv_vhdl, and freedom projects with the generated Rocket Chip and Zedboard/Vivado setup described here. The issue names no repository files or tests and provides no bounded acceptance condition; a useful next step would be to define the required integration path and a concrete UART or Linux milestone.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- linux, scala
- Domain
- embedded-iot, operating-systems
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 15/100