chipsalliance / chipsalliance/rocket-chip
Upstreaming utilities to chisel3
- Dominant language
- Scala
- Stars
- 3.9k
- Forks
- 1.3k
- Avg merge
- 5d 13m
- Merged PRs (30d)
- 1
Description
This has been talked about on and off for quite a while now, but some of the utilities in rocket-chip, like the async FIFOs, are quite general and would be good candidates for inclusion in a chisel standard library, which is being discussed in freechipsproject/chisel3#818
I'd just like to get thoughts from the rocket people about including these in a chisel standard library, which other parts could be useful to include, and how it could be done.
Contributor guide
Research direction
Start with the discussion in freechipsproject/chisel3#818 and review the rocket-chip utilities, including the async FIFOs. Identify which utilities are general enough for a Chisel standard library and document how they could be included. Done means the project’s preferred candidates and an upstreaming approach are agreed.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100