chipsalliance / chipsalliance/riscv-vector-tests

How to disable other lmul except lmul=1

Open
#74 3 comments 0 reactions 0 assignees View on GitHub
Dominant language
Go
Stars
118
Forks
40
PR merge metrics
No merged PRs in 30d

Description

I modified code in insn_util.go to this

> var allLMULs = []LMUL{1}
var wideningMULs = []LMUL{1}
var validLMULs = map[LMUL]struct{}{
allLMULs[0]: {},
}

But compilation has error
`2025/06/26 08:03:42 unreachable
2025/06/26 08:03:42 unreachable
make: *** [Makefile:121: generate-stage1] Error 1
make: *** Waiting for unfinished jobs....`

What should I do

Contributor guide

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Research direction

Start with the LMUL definitions in insn_util.go and the generate-stage1 target in Makefile:121. Reproduce the build failure and trace the reported unreachable diagnostics to determine which generator assumptions conflict with retaining only lmul=1. Done means the generator compiles and generate-stage1 completes with that restriction.

Written by the indexing model from the issue text.

Assessment

Tech stack
go
Domain
testing, tooling
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
30/100

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