chipsalliance / chipsalliance/python-fpga-interchange

Add support to emit VTR XML architecture file

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Python
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Description

In the context of being able to support the interchange format in multiple P&R tools, the next good candidate would be enabling place and route starting from an interchange device using VTR.

With https://github.com/SymbiFlow/python-fpga-interchange/pull/85 that is about to land, we can start iterating over a tool to generate an XML out of the testarch, compatible with VTR.

This tool/script would be similar as to `nextpnr_emit` and `populate_chip_info`.

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