chipsalliance / chipsalliance/f4pga-examples
Add targets for Arty and Nexys Video boards for counter and PicoSoC designs
Open
- Dominant language
- Verilog
- Stars
- 289
- Forks
- 79
- PR merge metrics
- No merged PRs in 30d
Description
This is just a matter of adding separate PCF/XDCs for each design plus make targets.
Contributor guide
No contributing guide indexed for this repository
Research direction
Locate the counter and PicoSoC design directories and inspect their existing PCF/XDC constraint files and Make targets. Compare current board targets to identify the naming and invocation pattern, then add the Arty and Nexys Video variants. Done means both designs have separate constraints and make targets for each requested board.
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system, embedded-iot
- Issue type
- Feature
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 48/100