chipsalliance / chipsalliance/f4pga-examples

udev permissions: add info to docs

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Dominant language
Verilog
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289
Forks
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No merged PRs in 30d

Description

The user's first experience with an FPGA board might be with this repo, so they may encounter the usual udev permission issues while doing the examples here. Add the info about how to update udev rules for the supported boards.

fyi @betocool-prog

Contributor guide

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First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating the documentation for the examples and the list of supported FPGA boards. Add guidance for updating udev rules for those boards, then verify that a new user can follow the examples without the usual udev permission problems.

Written by the indexing model from the issue text.

Assessment

Domain
documentation, embedded-iot, operating-systems
Issue type
Documentation
Difficulty
2/5
Estimated time
1-3 hours
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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