chipsalliance / chipsalliance/dromajo
Rewamp interrupt handling
- Dominant language
- C++
- Stars
- 244
- Forks
- 69
- PR merge metrics
- No merged PRs in 30d
Description
Another fall-out of Pull Request #15: the handling of interrupt embeds too much policy into Dromajo. For co-sim, we need to be able to adapt to the DUTs decision on when to take pending interrupts. The way current way is hacked and the better way would be to simply factor out of the instruction execution all handling of interrupts. Instead we leave it to the client to example pending interrupts and raise them as needed.
Contributor guide
No contributing guide indexed for this repository
Research direction
Start by reviewing Pull Request #15 and the current interrupt-handling path in Dromajo; the issue names no source files, tests, or entry point. Determine how pending interrupts are currently handled during instruction execution and what client-controlled behavior would constitute completion.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- operating-systems
- Issue type
- Refactor
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 25/100