chipsalliance / chipsalliance/chisel
DontCare does not support Clocks
- Dominant language
- Scala
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Description
**Type of issue**: bug report | feature request
**Impact**: API modification
**Development Phase**: request
**If the current behavior is a bug, please provide the steps to reproduce the problem:**
Trying to connect a clock output to DontCare results in the following exception.
`Caused by: chisel3.internal.ChiselException: cannot connect chisel3.core.Clock@1c9176 and chisel3.core.DontCare$@0`
I would expect this to be supported. Its easy to work around by converting to/from Bool.
Is there a rationale for not support Clock or is it an oversight?
**Please tell us about your environment:**
chisel3 commit:
```
commit 10751f57c595c899b4bcb81a6b0f78319ca66eb2
Merge: dc20aa4 9fd9433
Author: Jim Lawson
Date: Sun Mar 4 09:30:31 2018 -0800
Merge branch '3.1.x' into 3.1.0
```
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