Better error message for misuse of Domain association to ports

**Type of issue**: Feature Request

**Is your feature request related to a problem? Please describe.**

```scala
//> using repository https://central.sonatype.com/repository/maven-snapshots
//> using scala 2.13.18
//> using dep org.chipsalliance::chisel:7.13.0+9-256ede81-SNAPSHOT
//> using plugin org.chipsalliance:::chisel-plugin:7.13.0+9-256ede81-SNAPSHOT
//> using options -unchecked -deprecation -language:reflectiveCalls -feature -Xcheckinit
//> using options -Xfatal-warnings -Ywarn-dead-code -Ywarn-unused -Ymacro-annotations

import chisel3._
import chisel3.domain.{Domain, Field}
import chisel3.properties.Property
import _root_.circt.stage.ChiselStage

// Define PowerDomain with minimal fields
object PowerDomain extends Domain {
override def fields = Seq(
("name", Field.String)
)
def foo(source: String): chisel3.domain.Type = {
PowerDomain(
Property(source)
)
}
}

class DomainCrossingTest extends RawModule {
val in = IO(Input(UInt(8.W)))
val out = IO(Output(UInt(8.W)))

val power = PowerDomain.foo("test")
associate(out, power)
out := in
}

object Main extends App {
// Emit CHIRRTL
val chirrtl = ChiselStage.emitCHIRRTL(new DomainCrossingTest)

println(chirrtl)

// Emit SystemVerilog
val verilog = ChiselStage.emitSystemVerilog(new DomainCrossingTest)

println(verilog)
}
```
This generates invalid fir file (`power` is used before def).
```scala
public module DomainCrossingTest :
input in : UInt<8>
output out : UInt<8> domains [power]

domain power of PowerDomain(String("test")) 15:28]
connect out, in

```

Even though this is rejected by firtool I think ideally Chisel should reject this.
```verilog
:23:35: error: unknown domain name 'power'
output out : UInt<8> domains [power]

```

**Describe the solution you'd like**
Chisel raises an error when domain used in ports are defined in body (not sure this is possible actually).
**Describe alternatives you've considered**
The current behavior is also fine since firtool rejects.
**Additional context**

**What is the use case for implementing this feature?**

Start with Domain.associate and the ChiselStage.emitCHIRRTL entry point shown in the example, then compare Chisel's validation with firtool's unknown-domain error. The change is complete when using a domain in a port before its body definition produces a clear Chisel error instead of invalid FIR, with the existing example or a regression test covering it.

Written by the indexing model from the issue text.