Naming plugin support for arguments

**Type of issue**: Feature Request

**Is your feature request related to a problem? Please describe.**

People like to create complex expressions that result in sub-optimal names, e.g.
```scala
val foo = RegNext(RegNext(in + 1.U))
out := foo
```
This generates
```verilog
reg [7:0] foo_REG;
reg [7:0] foo;
always @(posedge clock) begin
foo_REG <= in
foo <= foo_REG;
end // always @(posedge)
assign out = foo;
```

The `_REG` comes from the fact that the inner register is unnamed.

**Describe the solution you'd like**

We could give better naming if the naming plugin would insert some `prefix` and/or `withName` calls in these nested expressions.

For example, the name of the argument to `RegNext` is `next` so we could use the plugin to change this to:
```scala
val foo = RegNext(withName("next")(prefix("next")(RegNext(in))))
```
This would give:
```verilog
reg [7:0] foo_next;
reg [7:0] foo;
always @(posedge clock) begin
foo_next <= in;
foo <= foo_next;
end // always @(posedge)
assign out = foo;
```

This is equivalent to something the plugin will already transform:
```scala
val foo = {
val next = RegNext(in)
RegNext(next)
}
```
This equivalence makes this feel like a really good idea to me.

This is all predicated on the compiler plugin being able to find out the name of the argument, that information is probably available but might not be.

Doing this naively could be very expensive as it would add A LOT of function calls, I think the optimization of only doing this when the expression is complex is a requirement of implementation.

**Describe alternatives you've considered**

We could not do this, but my idea is brilliant so no alternatives should be considered.

**What is the use case for implementing this feature?**

Better names, duh.