chipsalliance / chipsalliance/chisel

Use firrtl.bitcast operator for DataView/asTypeOf conversions

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Dominant language
Scala
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Description

Problem Statement
---

FIRRTL’s intermediate representation already defines a `BitCastOp` for bit-level reinterpreting between equal-width types (`Bundles`, `Vecs`, `UInt`, `SInt`, etc.), but this operator currently lacks parser/printer (ser/deser) support.
As a result, Chisel and CIRCT cannot leverage `BitCastOp` in emitted FIRRTL IR, falling back to DSL-side recursive split-and-reconnect logic for `asTypeOf`, `DataView`, `viewAs`, and similar conversions.

Desired Behavior
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Enable full FIRRTL parser and printer support for BitCastOp so that Chisel can lower all type reinterpret operations directly to a single BitCastOp, eliminating the recursive split-and-reconnect pattern.
I provide a related implementation here, which I think it's really cool and reduced the eDSL maintaining burden: sequencer/zaozi#70

Proposed Solution
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- FIRRTL Parser/AST updates in both CIRCT and chisel;
- Update implementation of `DataView` to use it;

Contributor guide

Open the contributing guide

Research direction

Start by reading the existing FIRRTL BitCastOp definition and tracing parser/printer paths in CIRCT and Chisel, then inspect the DataView implementation and the related sequencer/zaozi#70 change. Done means BitCastOp can be parsed and printed and DataView conversions use it instead of recursive split-and-reconnect logic.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
compilers
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
35/100

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