chipsalliance / chipsalliance/chisel

Add simulation logging library

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#435 3 comments 0 reactions 0 assignees View on GitHub
Feature feature request
Dominant language
Scala
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Description

I have added the UART scala code from the sifive repo to the rocket-chip. In the code, [there is a `printf()` to output the sending char during simulation](https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L79):
```
printf("%c", io.in.bits)
```
At the same time, I hope that [the rocket core will output execution logs](https://github.com/ucb-bar/rocket-chip/blob/master/src/main/scala/rocket/rocket.scala#L687) to help me for debugging:
```
printf("C%d: %d [%d] pc=[%x] W[r%d=%x][%d] R[r%d=%x] R[r%d=%x] inst=[%x] DASM(%x)\n",
...
```

What troubles me is that these two `printf()` will output to screen at the same time during simulation. This makes messages sent by UART interrupted by a large number of logs. I hope the generated code can separate the output of these two `printf()`. For example, the execution logs will be printed to a file `log.txt`, while the UART char is still output to the screen. What should I do?

In fact, I opened an issue #428 for the same trouble last week, but it was misunderstood and closed, and I have not got the solution yet. I hope I have made this issue clear this time. Thanks!

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