chipsalliance / chipsalliance/chisel
Inconsistencies Around Invalidation
- Dominant language
- Scala
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Description
Invalidate is currently being emitted kind of strangely and inconsistently.
First, for `Analog` types, an invalidation is emitted. However, this invalidation has no effect.
Consider:
``` scala
//> using scala "2.13.11"
//> using repository sonatype-s01:snapshots
//> using lib "org.chipsalliance::chisel::6.0.0-M3"
//> using plugin "org.chipsalliance:::chisel-plugin::6.0.0-M3"
//> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings", "-Ywarn-dead-code", "-Ywarn-unused", "-Ymacro-annotations"
import chisel3._
import chisel3.experimental.Analog
import circt.stage.ChiselStage
class Bar extends Bundle {
val a = Bool()
val b = Analog(1.W)
}
class Foo extends RawModule {
val out = IO(new Bar)
out :<= DontCare
}
object Main extends App {
println(
ChiselStage.emitCHIRRTL(
gen = new Foo
)
)
}
```
This emits:
```
FIRRTL version 3.1.0
circuit Foo :
module Foo :
output out : { a : UInt<1>, b : Analog<1>}
invalidate out.b
invalidate out.a
```
The `invalidate out.b` is a no-op.
Second, a connect to `DontCare` doesn't properly exclude probes:
``` scala
//> using scala "2.13.11"
//> using repository sonatype-s01:snapshots
//> using lib "org.chipsalliance::chisel::6.0.0-M3"
//> using plugin "org.chipsalliance:::chisel-plugin::6.0.0-M3"
//> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings", "-Ywarn-dead-code", "-Ywarn-unused", "-Ymacro-annotations"
import chisel3._
import chisel3.probe.Probe
import circt.stage.ChiselStage
class Bar extends Bundle {
val a = Bool()
val b = Probe(Bool())
}
class Foo extends RawModule {
val out = IO(new Bar)
out.excludeProbes :<= DontCare
}
object Main extends App {
println(
ChiselStage.emitCHIRRTL(
gen = new Foo
)
)
}
```
Current error:
```
[error] ProbeInvalid.scala 19:21: excluded field Foo.out.b: IO[Bool] has matching non-excluded field DontCare()
[error] There were 1 error(s) during hardware elaboration.
Exception in thread "main" chisel3.internal.Errors: Fatal errors during hardware elaboration. Look above for error list. Rerun with --throw-on-first-error if you wish to see a stack trace.
```
What I'm leaning towards is Chisel's `Connectable` should either be directly cognizant of only operating on FIRRTL Connectable types (definition: https://github.com/chipsalliance/firrtl-spec/blob/dcd63187d99a923b67caec597e374b8e400f070b/spec.md#connectable-types) or there should be helpers that can be used to only work with the FIRRTL Connectable parts of a `Data`. Put differently, it seems like the verbose method below should exist:
```
foo.excludeUnconnectable :<= DontCare
```
Alternatively, all the Chisel `Connectable` operators should only be operating on types which are, in fact FIRRTL Connectable.
#### Use Cases
1. Invalidating a wire that has probes in it without having to use `DataMirror` to exclude probes.
2. Tighten restrictions on what is illegal FIRRTL by defining invalidation only on FIRRTL Connectable types.
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