chipsalliance / chipsalliance/chisel

Escape sequence "%m" support for hierarchical name

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Scala
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Description

**Type of issue**: Feature Request

**Is your feature request related to a problem? Please describe.**

**Describe the solution you'd like**
Shall we support "%m" in `printf` (or more generally, `Printable`) to display hierarchical name,
just like what verilog is doing? Maybe we can simply generate "%m" in verilog to achieve that.

**Describe alternatives you've considered**

**Additional context**

**What is the use case for implementing this feature?**
For better debug output, we may want it to display hierarchical name.
For instance, we dump hierarchical name using "%m" together with perf counters in the XiangShan core,
but we can only use custom firrtl transform or `sed` command to achieve that now.

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