chipsalliance / chipsalliance/chisel
1-width non-`Bool` can't be casted to `ResetType` with `asTypeOf`
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
**Type of issue**: Bug Report
**Please provide the steps to reproduce the problem:**
Use `asTypeOf` to cast a `Uint(1.W)` to `Reset`.
```scala
class ResetTest extends Module {
val in = IO(Input(UInt(1.W)))
val out = IO(Output(Reset()))
out := in.asTypeOf(Reset())
}
object ResetTest extends App {
emitVerilog(new ResetTest)
}
```
**What is the current behavior?**
```
Exception in thread "main" chisel3.internal.ChiselException: Connection between sink (ResetTest.out_?: Wire[Reset]) and source (ResetTest.in: IO[UInt<1>]) failed @: Sink (Reset) and Source (UInt<1>) have different types.
```
**What is the expected behavior?**
`asTypeOf` works.
**Please tell us about your environment:**
- version: 3.5.4, 3.5.6
- OS: Linux 4.15.0-154-generic #161-Ubuntu SMP Fri Jul 30 13:04:17 UTC 2021 x86_64 x86_64 x86_64 GNU/Linux
**Other Information**
This works correctly with `AsyncReset`. `asTypeOf` calls `connectFromBits` with a new `Wire`, but the impl of `connectFromBits` for `ResetType` simply connects the signals with `:=`, which fails when the right hand side is not a `Reset`. `AsyncReset` instead casts the right hand side with `.asBool.asAsyncReset`. So a potential solution is that the right hand side is casted with `.asBool` before connecting with `:=`.
**What is the use case for changing the behavior?**
This makes parametric operations using `asTypeOf` in an `InjectingAspect` examining module ports fail. It seems that `reset` of modules have the type of `ResetType` at the point of injection.
Contributor guide
Assessment
This issue has not been assessed yet.