chipsalliance / chipsalliance/chisel

Nested module name collision with InjectingAspect

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Scala
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Description

**Type of issue**: Bug Report

**Please provide the steps to reproduce the problem:**

When InjectingAspect injects a pair of identical modules into different modules, name collision happens at firrtl level. Sample code is given below, where `TestPipe`s are injected into `TestSub`s.

```scala
// Modules to be injected
class TestPipe extends Module {
val io = IO(new Bundle {
val a = Input(Bool())
val b = Output(Bool())
})
io.b := io.a
}

// Modules to be injected into
class TestSub extends Module {
val io = IO(new Bundle {
val a = Input(Bool())
val b = Output(Bool())
})
}

// Instantiates 2 TestSubs
class TestTop extends Module {
val io = IO(new Bundle {
val a = Input(Bool())
val b = Output(Bool())
})

val sub1 = Module(new TestSub)
val sub2 = Module(new TestSub)

sub1.io.a := io.a
sub2.io.a := sub1.io.b
io.b := sub2.io.b
}

object Test extends App {
emitVerilog(
new TestTop,
annotations = Seq(
InjectingAspect(
{ top: TestTop =>
// Select both TestSubs
Select.collectDeep(top) { case m: TestSub => m }
},
{ m: TestSub =>
// Inject into them TestPipes
val pipe = Module(new TestPipe)
pipe.io.a := m.io.a
m.io.b := pipe.io.b
}
)
)
)
}
```

**What is the current behavior?**

```
Exception in thread "main" firrtl.passes.PassExceptions:
firrtl.passes.CheckHighFormLike$ModuleNameNotUniqueException: : Repeat definition of module TestPipe
firrtl.passes.CheckHighFormLike$ModuleNameNotUniqueException: : Repeat definition of module TestPipe
firrtl.passes.PassException: 2 errors detected!
```

**What is the expected behavior?**

The `TestPipe`s should be renamed / deduped.

**Please tell us about your environment:**

- version: 3.5.4, 3.5.6
- OS: Linux 4.15.0-154-generic #161-Ubuntu SMP Fri Jul 30 13:04:17 UTC 2021 x86_64 x86_64 x86_64 GNU/Linux

**Other Information**

By looking at tests of Chisel, I see that renaming within one module when injecting is supported. The problem is, I am injecting into different modules.

**What is the use case for changing the behavior?**

This can invalidate code generators trying to integrate Chisel with other tools.

Contributor guide

Open the contributing guide

Research direction

Start with the InjectingAspect entry point and reproduce the TestTop example that injects TestPipe into two TestSub modules. Follow the generated design through the FIRRTL module-name check, and consider the issue done when both injected modules compile without duplicate TestPipe definitions.

Written by the indexing model from the issue text.

Assessment

Tech stack
scala
Domain
compilers
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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