chipsalliance / chipsalliance/chisel
Fix verilog vs chisel doc rendering
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
**Type of issue**: bug report | documentation
**Impact**: no functional change
**Development Phase**: request
**Other information**
**If the current behavior is a bug, please provide the steps to reproduce the problem:**
visit https://www.chisel-lang.org/chisel3/docs/cookbooks/verilog-vs-chisel
https://github.com/chipsalliance/chisel3/pull/2323#issuecomment-1074349506
**What is the current behavior?**
https://www.chisel-lang.org/chisel3/docs/cookbooks/verilog-vs-chisel does not render HTML properly.
**What is the expected behavior?**
* HTML code should not show up in the generated doc
* code blocks should work
**Please tell us about your environment:**
**What is the use case for changing the behavior?**
Contributor guide
Assessment
This issue has not been assessed yet.