chipsalliance / chipsalliance/chisel

We have no documentation/training on `Mem`

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good first issue
Dominant language
Scala
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Description

**Type of issue**: documentation

**Impact**: no functional change

**Development Phase**: request

**Other information**

**If the current behavior is a bug, please provide the steps to reproduce the problem:**

We don't have any documentation that I can find on `Mem` in the Chisel bootcamp, or the website explanations docs or cookbooks. We only cover `SyncReadMem`.

**What is the current behavior?**

**What is the expected behavior?**

We should probably at least mention this in the explanations section

**Please tell us about your environment:**

**What is the use case for changing the behavior?**

Not having undocumented features

Contributor guide

Open the contributing guide

Assessment

This issue has not been assessed yet.

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