Dynamic Right Shift on SInt is an arithmetic shift, but the documentation says it is logical

**Type of issue**: documentation

**Impact**: no functional change

**Development Phase**: proposal

**Other information**

The documentation for the SInt [https://www.chisel-lang.org/api/3.4.3/chisel3/SInt.html] class says the right shift is a logical shift (as the documentation is written for the Bits class, where this behavior is presumably correct, but is overriden by some new behavior in the SInt class.
As the method in the Bits class is final, I couldn't simply add a function to the SInt class with the same implementation, but a different ScalaDoc-Comment.

**What is the (current and) expected behavior?**
The behavior is an arithmetic right shift (with bit padding), but the documentation does not reflect that yet

**Please tell us about your environment:**
Tested behavior against:
- version: `chisel3 3.4.3`
- OS: `Linux 5.13.12-200.fc34.x86_64 #1 SMP Wed Aug 18 13:27:18 UTC 2021 x86_64 x86_64 x86_64 GNU/Linux`

**What is the use case for changing the behavior?**
The documentation then actually matches what the code does (as tested in my code)

```scala
class ShiftDemo extends Module {
val io = IO(new Bundle{
val in1 = Input(UInt(1.W))
val in2 = Input(UInt(5.W))
val out = Output(UInt(5.W))
})
io.out := (io.in2.asSInt >> io.in1).asUInt
}

test(new ShiftDemo()) {dut =>
dut.io.in1.poke(1.U)
dut.io.in2.poke(0x10.U)
dut.io.out.expect(0x18.U) // works correctly
}
```