chipsalliance / chipsalliance/chisel
Cat() not returning a literal for literal inputs
- Dominant language
- Scala
- Stars
- 4.8k
- Forks
- 658
- Avg merge
- 18h 59m
- Merged PRs (30d)
- 14
Description
When `Cat()` (or `##`) is called on literal nodes, the result is not a literal node anymore:
```scala
val hwInfo = Cat(numCores.U(4.W), buildNum.U(4.W))
assert(hwInfo.isLit()) //fails
```
This is at least surprising to a Chisel newbie like me. I known that the Cat function merely generated the corresponding FIRRTL statement, and constant folding is done later in the process, so this might be out-of-scope. On the other hand, printing out the value of literals is very handy for the automatic creating of documentation (register maps in my case).
One might consider adding a `LitCat()` function, which could than be even called outside of a Module context, which would be very handy for testing.
**Type of issue**: feature request
**Impact**: no functional change
**Development Phase**: request
**Please tell us about your environment:**
- version: `3.3.2`
**What is the use case for changing the behavior?**
Automatic generation of documentation, building literals in test code (in the `LitCat` case)
Contributor guide
Research direction
Start by examining the Cat() and ## entry points and how they handle literal nodes before FIRRTL constant folding. Compare the current behavior with the proposed LitCat() use case. Done means literal inputs produce a literal result, with behavior suitable for documentation generation and test code.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- scala
- Domain
- backend-api-design
- Issue type
- Feature
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100