chipsalliance / chipsalliance/chisel
Get reset value from RegInit
Open
- Dominant language
- Scala
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Description
**Type of issue**: feature request
**Impact**: unknown
**Development Phase**: request
**Other information**
See SO topic, requested by @jackkoenig to submit feature request
https://stackoverflow.com/questions/64001012/retrieve-the-reset-value-of-reginit
**If the current behavior is a bug, please provide the steps to reproduce the problem:**
**What is the current behavior?**
Cannot get reset value of RegInit
**What is the expected behavior?**
Want to get reset value of RegInit
**Please tell us about your environment:**
**What is the use case for changing the behavior?**
Contributor guide
Assessment
This issue has not been assessed yet.