chipsalliance / chipsalliance/chisel

Get reset value from RegInit

Open
#1,599 0 comments 0 reactions 0 assignees View on GitHub
Dominant language
Scala
Stars
4.8k
Forks
658
Avg merge
18h 59m
Merged PRs (30d)
14

Description

**Type of issue**: feature request

**Impact**: unknown

**Development Phase**: request

**Other information**

See SO topic, requested by @jackkoenig to submit feature request
https://stackoverflow.com/questions/64001012/retrieve-the-reset-value-of-reginit

**If the current behavior is a bug, please provide the steps to reproduce the problem:**

**What is the current behavior?**
Cannot get reset value of RegInit

**What is the expected behavior?**
Want to get reset value of RegInit

**Please tell us about your environment:**

**What is the use case for changing the behavior?**

Contributor guide

Open the contributing guide

Assessment

This issue has not been assessed yet.

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.